Abstarct: In modern communication systems, quadrature oscillators are considered as the key parts. They have been applied in different range of applications such as, image rejection architectures, clock and data recovery (CDR), and QPSK modulators. Different structures have been proposed for quadrature oscillators which among them quadrature LC oscillators have many applications due to the appropriate phase-noise. Despite of this feature, LC oscillators consume large area on the chip because of the existence of passive inductors that is a serious problem to deal with especially in applications of high importance in terms of space occupied on the chip. As a result, the active inductors are much considered by the designers because of their less occupied area, the high quality factor and wide tuning range. Despite these advantages, inappropriate noise performance, non-linearity, high power consumption and dependence on temperature and process are considered as some their disadvantages. Since Colpitts oscillators are better than the cross-coupled oscillators in terms of the noise sensitivity function, Colpitts oscillator is used as the core of the oscillator in this thesis and the active inductor is used due to decrease of the occupied space on the chip. Also, in this structure, low-noise or noiseless elements are used in order to minimize the detrimental effects of active inducers in phase-noise. The phase-noise of proposed structure is about -104.93 dBc/Hz at 1 MHz frequency offset from the 0.66 GHz, and power consumption is 8.64 mW at the supply voltage of 1.8 V. Notably, proposed circuits have been simulate in Cadence TSMC 0.18 μm RF-CMOS technology by Cadence. Furthermore, post layout simulation of the proposed QVCO in Cadence verifies the good performance of the circuit.