Abstarct: With recently advances in digital communication algorithms and not responding moorʾs law in construction of micro electronic devices for good there is a basic need for advanced devices, circuits and systems from the point of speed‚ power consumption and size view,QCA has been presented for simulation of digital circuit with high performance speed and low power consumption by interest of designer and producer in computational devices in nano scale.This technology present solution nano scale for doing the calculations and information transmission.binary values have been shown in quantum dot with load position and process information by inter cellular coupling. Considering the Ram memories importance in computer systems speed‚ in QCA technology has shown different structures and simulation of Ram memory.in this study has presented a new structure for simulation of D-lath of memory cell by usage T Gates.suggestive design implemented in QCA Designer software and correct performance survey by simulation results. The number of cells in suggestive D-latch are 40 and 7 clock zones and area is 0.04〖μm〗^2 .and reduce 50 percent relative to the other D-latch structure also latch delay has reduced 25 percent.memory cell implement and simulate baxse on suggestive D-latch and 1×4 Ram by multilxayer method.memory cell contain 146 cells that reduce 11 number in comparison with compared structure.the area of memory cell is 0.018〖μm〗^2.