Abstarct: In this thesis different steps in design, simulation, implementation and measurement of a low noise amplifier (LNA) within the band [100MHz-2.5GHz] are presented. The amplifier is implemented with discrete element (SMD) on printed circuit board. It is designed as a single stage amplifier using bipolar junction transistor. A resistive-inductive Negative feedback is used to increase the gain flatness and stability. To improve input matching a series inductor and parallel capacitor were use as a matching network. Bias-T was used to provide required DC operating point voltages and currents for the baxse and the collector. ADS software was used for simulations and the implemented circuit was measured with a network analyzer. Following results was achieved by simulation: the power gain of designed WLNA was 17.8 dB with 0.7 dB ripple and the noise figure was better than 1.2 dB. Also input return loss was lower than -11 dB in simulation. The results of measurement were different from the simulation results. Maximum power gain was 10 dB and it was zero at upper frequencies of bandwidth. Measured return loss was lower than -29 dB at about 2100 MHz but it was worse than simulation results at lower frequency of bandwidth. The concept of network analyzer calibration and de-embedding was discussed in detail in one chapter. Also, some experiments were designed and performed using network analyzer to measure the scattering parameters of single transistor.