TK828 : Design and Implementation of a Real Time Cardiac Arrhythmias Identification Method on Spartan-6 FPGA Device
Thesis > Central Library of Shahrood University > Electrical Engineering > MSc > 2020
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Abstarct: Statistics show increasing catching people to heart disease in the World. Electrocardiogram(ECG) signal are one if the most important tools to detection of heart diseases. The reading of the ECG requires sufficient expertise, and in cases where access to a cardiologist is not possible, using of the automated methods for interpret of ecg signals is necessary.
this thesis introduces an efficient digital system to detection heart arrhythmia. Our algorithm has three stage. first stage, The preprocessing section including highpass filter and squaring function. second stage, including peak detection. third stage including arrhythmia detection using heart rate. Our algorithm for peak detection, in fact it is a kind of simplification of the famous method of Pan-Tompkins. We have reduced complexity of the algorithm relative to Pan-Tompkins method whether in the preprocessing section or the peak detection section. In the preprocessing section, reduce the number of filters and in the peak detection section by an algorithm wich has only one set of adaptive threshold (instead of two in Pan-Tompkins algorithm) reduce The computational load and consequently, minimized consumer resources.
The algorithm is implemented in FPGA Spartan6 and written in VHDL and tested on Xilinx ISE 14.7. The performance of the proposed implementation is evaluated for peak detection in terms of sensitivity, positive predictivity and accuracy which is 98%, 97% and 96% respectively. We written the algorithm for Normal Sinus Rhythm, Ventricular Tachycardia, Super Ventricular Tachycardi, Sinus Bradycadia and Atrial Fibrillation. For testing the efficiency of the algorithm the MIT/BIH arrhythmia ECG databaxse were used.
Keywords:
#Electrocardiogram(ECG) #R peak detection #Heart arrhythmia #MIT/BIH Arrhythmia databaxse #Field programmable gate arrays(FPGA) Keeping place: Central Library of Shahrood University
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