Abstarct: Low noise amplifiers (LNAs) are usually the first block after the antenna whose duty is to amplify the received signal from antenna without adding any extra noise and distortions. High gain, low power dissipation, appropriate impedance matching, low noise figure, and low silicon consumption are among the most important characteristics of LNAs. So far LNAs have been designed and fabricated employing different techniques, however, Integration of the LNAs leads to several issues such as inappropriate input-output matching due to parasitic elements forming during fabrication and also higher power dissipation. In this thesis an ultra-wideband LNA has been designed and simulated employing noise cancellation technique. Furthermore, we managed to decrease and improve the power consumption via positive feedback in noise cancellation path.After that more decrease in power consumption is achieved by changing structure with a sub-one-volt structure. Moreover, the proposed structure has been examined in the means of stability which revealed the absolute stability of the proposed circuit. The presented LNA has been simulated in standard TSMC 0.18_m process using Cadence-IC. Minimum noise figure of the proposed LNA has been reduced by 2dB compared to the conventional structure and has reached 3.6-4.5dB in frequency range of 2-12GHz. Maximum gain of the proposed LNA is 18.57dB. S11 and S22 of the designed structure are -9.24dB and -9.74dB, respectively. S12 is below -28.5dB all over the operating frequency range. In the case of linearity, IIP3 of the proposed LNA has reached -3.42dBm which shows significant change compared to the previous structure. Power consumption of the LNA using a 0.8V supply voltage is 4.89mW. Post layout simulation of the final structure has also been conducted in standard TSMC 0.18 _m process using Cadence-IC and the results have revealed the appropriate performance of the proposed LNA.