TK1019 : Design and Simulation of a Voltage Controlled Oscillator with Low Phase Noise Variation in whole Tuning Range
Thesis > Central Library of Shahrood University > Electrical Engineering > MSc > 2024
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Abstarct:
Although today, voltage-controlled LC oscillators are highly regarded in low-noise applications due to their low phase noise, the phase noise of these oscillators changes throughout their tuning range, leading to increased maximum phase noise and degraded oscillator performance. Generally, in many reported cases, even for LC oscillators with narrow tuning ranges (less than 15%), where the issue of phase noise degradation during tuning is significantly lower, for every 3% change in the frequency tuning range, the phase noise decreases by about 1 dB/Hz.
The structure presented in this research is a complementary LC oscillator whose behavior in its trailing edge is similar to that of class C oscillators, exhibiting higher drive currents at the zero-crossing points of the output signal. This characteristic allows for automatic regulation of the oscillator's drive current with changes in frequency, thereby reducing the fluctuations in output phase noise throughout the frequency tuning range. In addition to the proposed trailing edge structure, taking into account the output phase noise during the frequency tuning range, we were able to achieve a phase noise of less than -136.6 dBc/Hz across the entire tuning range, by appropriately biasing the cross-coupling pairs and reducing the phase noise fluctuations at an offset of 1 MHz for a tuning range of approximately 30% to less than -1 dBc/Hz. It is worth mentioning that the average figure of merit of the proposed design is better than -189.2 dBc/Hz. All proposed circuits have been implemented and simulated using Cadence software in a 0.18µm TSMC CMOS technology.
Keywords:
#VCO #DCO #DVCO #phase noise #phase noise compensation. Keeping place: Central Library of Shahrood University
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